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Espressif Systems /ESP32-P4 /ISP /BLC_CTRL0

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Interpret as BLC_CTRL0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BLC_R3_STRETCH)BLC_R3_STRETCH 0 (BLC_R2_STRETCH)BLC_R2_STRETCH 0 (BLC_R1_STRETCH)BLC_R1_STRETCH 0 (BLC_R0_STRETCH)BLC_R0_STRETCH

Description

blc stretch control register

Fields

BLC_R3_STRETCH

this bit configures the stretch feature of bottom right channel. 0: stretch disable, 1: stretch enable
BLC_R2_STRETCH

this bit configures the stretch feature of bottom left channel. 0: stretch disable, 1: stretch enable
BLC_R1_STRETCH

this bit configures the stretch feature of top right channel. 0: stretch disable, 1: stretch enable
BLC_R0_STRETCH

this bit configures the stretch feature of top left channel. 0: stretch disable, 1: stretch enable

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data